Title:
複数画像表示回路およびこの回路による複数画像表示方法
Document Type and Number:
Japanese Patent JP3573680
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a plural-image display circuit for respectively displaying image data read from a frame memory by a control means at optional positions on a display screen as display images and turning them to composite images and a plural-image display method using the circuit. SOLUTION: Since this circuit is provided with a preprocessing means 16 for supplying a memory access control part 17 with plural signals SG61, 62 and 63 for specifying images for reading the source image data of the frame memories 12a and 12b corresponding to each horizontal line on the display screen on the basis of display coordinates 1 and 2 for displaying the source image data SG21 and 22 on the screen of a display part 15 as the images and the data of source image coordinates 1 and 2 for indicating the positions of the source image data SG21 and 22 in the plural frame memories 12a and 12b, two scan-converted display images are displayed at the optional positions on the display screen with less hardware using only one scan converter.
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Inventors:
Yuichi Takata
Application Number:
JP2000091650A
Publication Date:
October 06, 2004
Filing Date:
March 29, 2000
Export Citation:
Assignee:
NEC Microsystems, Inc.
International Classes:
G06T3/40; G09G5/00; G09G5/14; G09G5/377; G09G5/397; G09G5/399; H04N5/262; H04N5/265; H04N5/66; (IPC1-7): H04N5/265; G06T3/40; H04N5/66
Domestic Patent References:
| JP2001255862A | ||||
| JP6261263A | ||||
| JP6261262A | ||||
| JP5346773A | ||||
| JP5103324A |
Attorney, Agent or Firm:
Tatsuo Tokumaru