Title:
送信装置および受信装置
Document Type and Number:
Japanese Patent JP3588064
Kind Code:
B2
Abstract:
A transmitting apparatus and a receiving apparatus that minimize a buffer's size without increasing the volume of data to memorize in the receiving apparatus. Data block making section 110 makes data blocks by dividing transmission on a per transmission unit basis. For each data block, CRC generating section 120 generates a CRC code, which is an error detection code. Transmitting section 130 transmits the data block multiplexing the CRC code upon the data block. RAM 140 temporarily memorizes the data block and the CRC code. Control signal receiving section 150 receives a control signal transmitted from receiving apparatus 200 to identify the next needed data block. When the control signal received in control signal receiving section 150 is one in request of the next data, control section 160 instructs transmission section 130 to send the next data block. When the control signal requests retransmission, an instruction is given to transmission section 130 to retransmit the data block and CRC code memorized in RAM 140.
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Inventors:
Sadaki Futaki
Katsuhiko Hiramatsu
Katsuhiko Hiramatsu
Application Number:
JP2001214571A
Publication Date:
November 10, 2004
Filing Date:
July 13, 2001
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H04L1/00; H04L1/14; H04L1/16; H04L1/18; H04L29/02; H04L29/08; (IPC1-7): H04L1/16; H04L29/02; H04L29/08
Domestic Patent References:
| JP11018086A | ||||
| JP3074946A | ||||
| JP61281640A |
Attorney, Agent or Firm:
Koichi Washida