Title:
可調整電流源及びその制御方法
Document Type and Number:
Japanese Patent JP3596637
Kind Code:
B2
Abstract:
An output driver circuit for an integrated circuit is disclosed, where the output driver drives an output terminal with a high logic level having a voltage limited from the power supply voltage of the integrated circuit. The limited voltage is provided by applying a limited output high voltage to an output buffer, such that the drive signal applied to the gate of the pull-up transistor in the output driver is limited by the limited output high voltage applied to the output buffer. A voltage reference and regulator circuit for generating the limited output high voltage is also disclosed, and is based on a current mirror. The sum of the current in the current mirror is controlled by a bias current source, which may be dynamically controlled within the operating cycle or programmed by way of fuses. An offset compensating current source adds current into the reference leg of the current mirror to eliminate the development of an offset voltage in the current mirror, and the limited output high voltage is shifted by the threshold voltage of the pull-up drive transistor by way of a threshold shift circuit.
Inventors:
David sea mac rule
Application Number:
JP33198395A
Publication Date:
December 02, 2004
Filing Date:
December 20, 1995
Export Citation:
Assignee:
STMicroelectronics,Inc.
International Classes:
H03F3/343; G05F3/26; H03F3/347; (IPC1-7): H03F3/343
Domestic Patent References:
| JP5063462A |
Foreign References:
| US4064506 | ||||
| US4608530 |
Attorney, Agent or Firm:
Kosaku Sugimura
Yasunori Sato
Norita Tomita
Umemoto Masao
Yasunori Sato
Norita Tomita
Umemoto Masao