Title:
不揮発性半導体メモリ装置およびその製造方法
Document Type and Number:
Japanese Patent JP3600326
Kind Code:
B2
Abstract:
A tunnel oxide film is formed on the surface of a p-type silicon substrate, and a floating gate electrode made from a polysilicon film is formed on the surface of the tunnel oxide film. On the surface of the floating gate electrode, a control gate electrode is formed via an NON film formed by sequentially stacking a silicon nitride film, a silicon oxide film, and a silicon nitride film. A side oxide film is formed on the side surfaces of the floating gate electrode and the control gate electrode. Source and drain regions made from an n-type diffused layer are formed on the surfaces of element regions of the silicon substrate on the two sides of the floating gate electrodes.
Inventors:
Nobuyoshi Takeuchi
Application Number:
JP23795995A
Publication Date:
December 15, 2004
Filing Date:
September 18, 1995
Export Citation:
Assignee:
Muang Hong Electronic Co., Ltd.
International Classes:
H01L21/28; H01L21/318; H01L21/8247; H01L27/115; H01L29/423; H01L29/51; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L21/318; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP1134946A | ||||
| JP5267684A | ||||
| JP59112657A | ||||
| JP3050772A | ||||
| JP6268234A |
Attorney, Agent or Firm:
Yoshifumi Masaki