Title:
中央処理装置
Document Type and Number:
Japanese Patent JP3619939
Kind Code:
B2
Abstract:
An instruction code includes a first memory address part 22 and a second memory address part 23, and when a microinstruction decoder 14 decodes an operation code of save or restore instruction of the instruction code prefetched by an instruction queue 13, a micro-ROM 15 assigns the task number specified by the first memory address part 22 to an index value, reads a register list of the task from a context save information specified by the second memory address part 23, and selectively saves or restores the content of the register specified by the register list. With this configuration, the central processing unit can save or restore the context with a small occupied memory quantity and at high speed.
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Inventors:
Kazuo Nakamura
Application Number:
JP22961994A
Publication Date:
February 16, 2005
Filing Date:
September 26, 1994
Export Citation:
Assignee:
Renesas Technology Corp.
International Classes:
G06F9/46; G06F9/38; G06F9/48; (IPC1-7): G06F9/46
Domestic Patent References:
| JP3053328A | ||||
| JP62151940A | ||||
| JP62038943A | ||||
| JP4109336A | ||||
| JP59105152A | ||||
| JP8063361A | ||||
| JP5241834A | ||||
| JP3186928A | ||||
| JP2284235A |
Attorney, Agent or Firm:
Nobuo Kono