Title:
縦の溝を有する高電圧用の半導体デバイス
Document Type and Number:
Japanese Patent JP3718223
Kind Code:
B2
Abstract:
An optically-triggered silicon controlled rectifier (SCR) (21) having a number of semiconductor layers (23, 24, 31) diffused into an N type substrate (22). Specifically, the SCR is formed by diffusing a first P+ layer (23) into an upper surface of the substrate. Then, an N+ layer (24) is diffused into a portion of an upper surface of the first P+ layer. An oxide layer (25) which is permeable to optical radiation is formed on the first P+ layer. A conductive cathode terminal (26) is then deposited on the N+ layer. Therefore, a trench (30) is etched in the lower surface of the substrate. The trench is defined by a depth and a surface. A second P+ layer (31) is diffused into the surface of the trench. The depth of the trench substantially defines a spacing between the first and second P+ layers. The chip is soldered onto a pedestal (33) formed on a lead frame (34). The solder is deposited in the trench and contacts the second P+ layer to form an anode terminal (36). The pedestal may be formed by either etching or stamping a depression (35) in the lead frame.
Inventors:
David Whitney
Application Number:
JP52238494A
Publication Date:
November 24, 2005
Filing Date:
March 31, 1994
Export Citation:
Assignee:
Siemens Components, Inc.
International Classes:
H01L29/739; H01L29/78; H01L29/74; H01L29/86; H01L29/87; H01L31/111; (IPC1-7): H01L29/74; H01L29/78
Domestic Patent References:
| JP63092059A | ||||
| JP58116767A | ||||
| JP50135988A | ||||
| JP54042986A |
Attorney, Agent or Firm:
Toshio Yano
Toshiomi Yamazaki
Takuya Kuno
Toshiomi Yamazaki
Takuya Kuno