Title:
マルチチップメモリシステム内での分散された電力発生のための方法およびシステム
Document Type and Number:
Japanese Patent JP3755764
Kind Code:
B2
Abstract:
Techniques for producing and supplying various voltage levels within a memory system having multiple memory blocks (e.g., memory chips) are disclosed. The various voltage levels can be produced by charge pump and regulator circuitry within the memory system. The various voltage levels can be supplied to the multiple memory blocks through a power bus. According to one aspect of the invention, charge pump and regulator circuitry is not only provided within each of the memory blocks of a memory system, but also the charge pump and regulator circuits are not used to supply voltage signals to their own memory blocks. Instead, the charge pump and regulator circuits are used to supply voltage signals to other memory blocks.
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Inventors:
Pasternak, John H.
Application Number:
JP2002566502A
Publication Date:
March 15, 2006
Filing Date:
February 08, 2002
Export Citation:
Assignee:
SanDisk Corporation
International Classes:
G06F12/00; G11C16/06; G06F1/26; G06F12/06; G11C5/14; G11C16/30
Domestic Patent References:
| JP2004531801A | ||||
| JP2002133883A |
Foreign References:
| US5621685 |
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda