To provide a high integrated multi-port RAM which can perform simultaneous and parallel read / write from a plurality of ports practically.

The multi-port RAM is provided with a plurality of memory blocks (MB(i, J)) by the memory cell of a single port, the global bit lines (GBLa, GBLaB, GBLb and GBLbB) of multi-port constitution and a switch means (SW(i, j)) for selectively connecting a bit line inside the memory block to the global bit line. The global bit lines and the bit lines are provided in different wiring layers and the wiring pitch of the global bit lines is made larger than the wiring pitch of the bit lines.

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