Title:
半導体装置
Document Type and Number:
Japanese Patent JP4012840
Kind Code:
B2
Abstract:
A semiconductor chip for amplification is connected between input-side and output-side matching circuits, and each of matching circuits includes balanced circuits which receive signals different in phase by 180 degrees, divided from an input signal. The balanced circuits are connected at a virtual grounding point, which is used as a grounding point sensitive to RF characteristics in an IPD. Thus, a semiconductor device can be free from influence of variations of grounding wires and can be reduced in size, weight, and cost.
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Inventors:
Akira Inoue
Akira Ota
Kiyotake Goto
Akira Ota
Kiyotake Goto
Application Number:
JP2003069600A
Publication Date:
November 21, 2007
Filing Date:
March 14, 2003
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L23/12; H01L23/66; H03F1/56; H03F3/60
Domestic Patent References:
| JP4321308A | ||||
| JP66151A | ||||
| JP2003338724A |
Attorney, Agent or Firm:
Aoyama Aoi