Title:
タイミングスキュー除去手段を備えた送信機回路
Document Type and Number:
Japanese Patent JP4017518
Kind Code:
B2
Abstract:
The present invention relates generally to the transmission of digital data. More particularly, the invention relates to a high-speed data transmission between integral circuits (ICs) or chips.A data transmission means for high-speed transmission of digital data is proposed, the data transmission means comprising:at least one driver for driving a transmission line; anda timing deskewing means connected thereto, whereinthe timing deskewing means comprisesa storage means for recording and storing information on skew caused by inter-symbol interference and cross-talk influence in the transmission line, for at least one data pattern transmitted through the transmission line; andan adjustment means for generating and applying a correction to the timing position of a signal transition between two logical levels, the correction being generated on the basis of the information stored in the storage means, so as to compensate for the above skew.The present invention allows to reduce the skew of signals at the end of a transmission line so as to compensate for the effects of cross-talk and various signal reflections, settling time influence, or other kind of inter-symbol interference like frequency dependent line resistance due to skin effect and provide thereby a high performance transmission means for high speed transmission of digital data.
Inventors:
Avrosimov, Igor Anatolyevich
Atunin, Vasily Grigoryvich
Diaz, Alexander, Roger
Atunin, Vasily Grigoryvich
Diaz, Alexander, Roger
Application Number:
JP2002540310A
Publication Date:
December 05, 2007
Filing Date:
October 31, 2001
Export Citation:
Assignee:
Aquid Corporation (Guernsey) Limited
International Classes:
H03K19/0175; H04L7/00; G01R31/317; G06F1/10; H04B3/32; H04L25/02
Domestic Patent References:
| JP2000174609A | ||||
| JP7311735A | ||||
| JP7297691A |
Foreign References:
| US5953521 |
Attorney, Agent or Firm:
Shoyo domestic and overseas patent office