Title:
データ処理装置
Document Type and Number:
Japanese Patent JP4027416
Kind Code:
B2
Abstract:
A technology for achieving a high-speed data processing apparatus is provided. The communication control apparatus 10 includes a communication control section 2 on the receiving side, a packet processing circuit 20, and a communication control section 4 on the sending side. The communication control sections 2 and 4 have respective PHY processing sections 5a and 5b which process the physical layer of packets, and respective MAC processing sections 6a and 6b which process the MAC layer of the packets. The packet processing circuit 20 is composed of wired logic circuits, and performs filtering and other processing according to data included in the packets. The processing is executed by the dedicated hardware circuit without requiring a CPU or an OS.
Inventors:
Nagoya tribute
Application Number:
JP2007503569A
Publication Date:
December 26, 2007
Filing Date:
July 07, 2005
Export Citation:
Assignee:
Duaxes Corporation
International Classes:
H04L45/74
Domestic Patent References:
| JP2004140618A | ||||
| JP2004187201A | ||||
| JP2001168911A | ||||
| JP2004172917A |
Foreign References:
| WO2002082750A1 |
Attorney, Agent or Firm:
Sakaki Morishita