Title:
受信装置およびハイブリッドARQ通信システム
Document Type and Number:
Japanese Patent JP4032065
Kind Code:
B2
Abstract:
A receiver (2) receives data transmitted from a transmitter. The data received is stored in an H-ARQ buffer (36), and an average value of an absolute value of data is computed by an average-value computing unit (32). An H-ARQ-combining determining/processing unit (34) compares an average value M0 of an existing data stored in the H-ARQ buffer (36) and an average value M1 of retransmission data, which is retransmitted, under a predetermined condition to determine whether reliability is high or low. When the reliability is higher than a predetermined value, the existing data and the retransmission data are combined by a combiner (37), and then error correcting is performed by an error-correction decoding unit (39). Then, decoded bits are output. When many errors are present, retransmission of data is requested. When the reliability is lower than the predetermined value, retransmission of data is directly requested without combining the existing data and the retransmission data.
Inventors:
Shunji Miyazaki
Kazuo Obuchi
Tetsuya Yano
Kazuo Obuchi
Tetsuya Yano
Application Number:
JP2005500198A
Publication Date:
January 16, 2008
Filing Date:
May 27, 2003
Export Citation:
Assignee:
富士通株式会社
International Classes:
H04L1/16; H04L1/18
Domestic Patent References:
| JP20029741A | ||||
| JP2001119426A | ||||
| JP2000244461A |
Attorney, Agent or Firm:
Akinori Sakai