Title:
2線式通信バスに対称形の出力信号を供給するラインドライバ
Document Type and Number:
Japanese Patent JP4040456
Kind Code:
B2
Abstract:
A line driver for driving a two-wire communication bus (8, 9) consisting of a chain of inverters (I1, . . . , I6). Each inverter may consist of a series arrangement of a PMOS (M1) and an NMOS (M2) transistor. The output terminals (1b, 3b, 5b) of the odd-numbered inverters (I1, I3, I5) are connected to the first wire (8) of the bus through respective first resistors (R1, R3, R5) and the output terminals (2b, 4b, 6b) of the even-numbered inverters (I2, I4, I6) are connected to the second wire (9) of the bus through respective second resistors (R2, R4, R6).Owing to the propagation delay of the inverters and the additive effect of the resistors the voltages on the bus wires change only in successive small steps. This results in a small common mode voltage on the bus wires and, consequently, a low electromagnetic emission.
Inventors:
Boezen Hendrik
Application Number:
JP2002540397A
Publication Date:
January 30, 2008
Filing Date:
October 16, 2001
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G06F3/00; H04L25/02; H03K5/125; H04L25/03
Domestic Patent References:
| JP64000814A | ||||
| JP2188023A | ||||
| JP5206810A | ||||
| JP64029116A | ||||
| JP2000174606A | ||||
| JP8250995A | ||||
| JP6326592A | ||||
| JP53139456A | ||||
| JP4091518A |
Attorney, Agent or Firm:
Tadahiko Ito
Susumu Tsugaru
Akihiko Miyazaki
Susumu Tsugaru
Akihiko Miyazaki