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Title:
不揮発性強誘電体メモリ装置及びその駆動方法
Document Type and Number:
Japanese Patent JP4050132
Kind Code:
B2
Abstract:
A nonvolatile ferroelectric memory device includes a first cell array block and a second cell array block, each divided into an upper part and a lower part; sensing amplifiers arranged one by one on multiple bit lines at a middle portion between the first cell array block and the second cell array block; a data I/O encoder connected to end portions of the multiple bit lines for outputting multi-bit signals by encoding outputs of the sensing amplifiers; and a first reference cell array block and a second reference cell array block arranged between the first cell array block and the data I/O encoder and between the second cell array block and the data I/O encoder.

Inventors:
Khan, Hee Bok
Kii, Hung Woo
Lee, Geun Il
Park, Je Hoon
Kim, Jun Hwan
Application Number:
JP2002327821A
Publication Date:
February 20, 2008
Filing Date:
November 12, 2002
Export Citation:
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Assignee:
HYNIX SEMICONDUCTOR INC.
International Classes:
G11C11/22; G11C11/56; H01L31/0328
Domestic Patent References:
JP9265785A
JP2000149584A
Attorney, Agent or Firm:
Masaki Yamakawa
Hiroro Kurokawa
Masayuki Konno
Osamu Nishiyama
Shigeki Yamakawa