Title:
回路基板に組み込まれた部品を検査するための装置及び方法
Document Type and Number:
Japanese Patent JP4087413
Kind Code:
B2
Abstract:
A method is provided for testing a built-in component including multiple terminals in a multi-layered circuit board. At least one signal pad is provided on a top surface of the multi-layered circuit board for signal transmission. Each of the signal pads are electrically connected to one of the multiple terminals. At least one test pad is provided on the top surface of the multi-layered circuit board and each of the test pads is electrically connected to one of the multiple terminals. Then, detection occurs regarding one of the signal pads and one of the test pads that are electrically connected to a same one of the multiple terminals in order to determine a connection status of an electric path extending from the one signal pad through the same one terminal to the one test pad.
Inventors:
Way-Min Zhou
Min-Lin Lee
Shin-Julie
Shin-Sun shoe
Chang-Shen Chen
Min-Lin Lee
Shin-Julie
Shin-Sun shoe
Chang-Shen Chen
Application Number:
JP2006027788A
Publication Date:
May 21, 2008
Filing Date:
February 03, 2006
Export Citation:
Assignee:
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
International Classes:
H05K3/46; G01R31/02; H05K1/11; H05K3/00
Domestic Patent References:
| JP1201990A | ||||
| JP2001160688A | ||||
| JP5225749A |
Attorney, Agent or Firm:
Akira Kurahashi