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Title:
LSIフロアプラン決定装置及び方法並びにプログラム記録媒体
Document Type and Number:
Japanese Patent JP4126323
Kind Code:
B2
Abstract:

To provide an LSI floor plan deciding device capable of deciding an LSI floor plan capable of assigning an arrangement position also for an LSI block having a fixed shape.

This device is provided with a means for inputting or generating an initial solution of an arrangement relation description sentence in which the arrangement relation of the LSI block as the LSI floor plan is described in a tree structure and a means for deciding the LSI floor plan by repeating the followings: The arrangement relation description sentence is operated. If the LSI block in the fixed shape cannot be arranged in the LSI floor plan regulated by the arrangement relation description sentence by the operation, the LSI block in the fixed shape is merged with one or more other LSI blocks to perform packing there so as to enable the arrangement. After evaluating it, whether the arrangement relation description sentence is to be changed or not is decided according to the evaluation.

COPYRIGHT: (C)2007,JPO&INPIT


Inventors:
Toshiyuki Shibuya
Application Number:
JP2007061290A
Publication Date:
July 30, 2008
Filing Date:
March 12, 2007
Export Citation:
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Assignee:
富士通株式会社
International Classes:
G06F17/50
Domestic Patent References:
JP10254940A
JP10111878A
JP6244280A
Attorney, Agent or Firm:
Nao Oda
Kazuo Hosaka
Akihiko Watanabe



 
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