Title:
メモリ管理を改良するための方法、メモリ管理機構及びコンピュータ・プログラム
Document Type and Number:
Japanese Patent JP4129458
Kind Code:
B2
Abstract:
Memory management in a computer system is improved by preventing a subset of address translation information from being replaced with other types of address translation information in a cache memory reserved for storing such address translation information for faster access by a CPU. This way, the CPU can identify the subset of address translation information stored in the cache.
Inventors:
Day, Michael, Norman
Hoffsty, Harm, Peter
Jones, Charles, Ray
Carl, James, Alan
Truwong, Twong, Quwang
Sippy, David
Hoffsty, Harm, Peter
Jones, Charles, Ray
Carl, James, Alan
Truwong, Twong, Quwang
Sippy, David
Application Number:
JP2004558763A
Publication Date:
August 06, 2008
Filing Date:
November 21, 2003
Export Citation:
Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
G06F12/10; G06F12/08; G06F12/12
Domestic Patent References:
| JP4100158A | ||||
| JP4018650A | ||||
| JP2000057054A | ||||
| JP11232174A | ||||
| JP2002163151A | ||||
| JP2002140234A | ||||
| JP11509356A | ||||
| JP10232839A | ||||
| JP10232834A | ||||
| JP3015958A | ||||
| JP63254544A | ||||
| JP62156744A |
Attorney, Agent or Firm:
Hiroshi Sakaguchi
Yoshihiro City
Takeshi Ueno
Yoshihiro City
Takeshi Ueno