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Title:
電力用半導体装置
Document Type and Number:
Japanese Patent JP4142539
Kind Code:
B2
Abstract:

To uniform each main electrode potential of a plurality of semiconductor chips, to suppress a high frequency radio wave flowing between the semiconductor chips, and to ensure a stable operation of a semiconductor device.

Wiring patterns 3a, 3b on emitter substrates 3A, 3B are connected to emitters of corresponding IGBT chips 1A, 1B via aluminum wires 9A, 9B, and ends of the patterns 3a, 3b facing each other are connected to projected first and third pads 13AP1, 13BP3. On the respective substrates 3A, 3B, second and fourth pads 13AP2, 13BP4 are arranged so as to face the pads 13AP1, 13BP3, inductor members 13A, 13B are electrically arranged. Inductance values of the members 13A, 13B are sufficiently greater than those of the aluminum wirings 9A, 9B, 11, 12.

COPYRIGHT: (C)2005,JPO&NCIPI


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Inventors:
Isao Umezaki
Application Number:
JP2003332847A
Publication Date:
September 03, 2008
Filing Date:
September 25, 2003
Export Citation:
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Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L25/07; H01L25/18
Domestic Patent References:
JP2002141465A
JP11163257A
JP8191130A
JP2000350475A
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita