基板異常検出回路付き装置

Title:

基板異常検出回路付き装置

Document Type and Number:

Japanese Patent JP4185929

Kind Code:

B2

Abstract:

To provide a system for surely detecting and preventing wrong installation of DSA, in semiconductor testing devices or imperfect connection of connectors.

The testing device comprises a set of DSA 10a, 10b equipped with a socket board 11, and a mother board 20 equipped with connectors to which connectors 14 of each socket board 11 on this set of DSA 10a, 10b. It is constituted of an inside diameter (ID) setting board respectively-provided on each of DSA 10a, 10b which defines ID numbers assigned to the DSA 10a, 10b and outputs ID signal indicating such ID numbers, a coincidence circuit which inputs the ID signal output from the ID setting board to detect the matching of the ID signal, and a daisy chain circuit which inputs signal from one of the connectors 21 on the mother board 20 side and sequentially-transmits signal to all connectors 21, 14 via connectors 14 on corresponding DSA side to detect the presence of output signal.

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Inventors:

Plain cultivation

Application Number:

JP2005317022A

Publication Date:

November 26, 2008

Filing Date:

October 31, 2005

Export Citation:

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Assignee:

Advantest Corporation

International Classes:

G01R31/28; G01R31/26

Domestic Patent References:

JP6180343A
JP11030644A

Attorney, Agent or Firm:

Akihiro Ryuka

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