Title:
データ交換装置およびその方法
Document Type and Number:
Japanese Patent JP4188446
Kind Code:
B2
Abstract:
A device for use when exchanging data between two processor units comprises a first processor unit (6;8), which is arranged to selectively operate in one of a synchronous mode and an asynchronous mode when exchanging data with a second processor unit (8;6) through a data memory area in a common memory (7). Preferably, the access to the data memory area is controlled by a state machine in the first processor unit. The state machine has a first state in which the data memory area is free, a second and a third state in which the data memory area is reserved for the first processor unit(6;8) and the second processor unit (8;6), respectively, and a fourth and a fifth state, in which the data memory area is accessed by the first processor unit (6;8) and the second processor unit (8;6), respectively. The device is advantageously used in a fieldbus system.
Inventors:
Nicholas Hasbiel
Jagen, Johansson
Stafan, Dar Strum
Andreas, Croup
Jagen, Johansson
Stafan, Dar Strum
Andreas, Croup
Application Number:
JP10300098A
Publication Date:
November 26, 2008
Filing Date:
April 14, 1998
Export Citation:
Assignee:
HMS INDUSTRIAL NETWORKS AB
International Classes:
G06F15/167; G06F13/40
Domestic Patent References:
| JP6168213A | ||||
| JP4054552A | ||||
| JP2014353A |
Attorney, Agent or Firm:
Kazuo Sato
Asahi Maejima
Hiroyuki Nagai
Asahi Maejima
Hiroyuki Nagai