Title:
受信回路
Document Type and Number:
Japanese Patent JP4234026
Kind Code:
B2
Abstract:
Interruption of a reception signal is achieved by placing a first low noise amplifier into the sleep state, and short-circuiting a shunt switch provided between differential input terminals of a second low noise amplifier during a DC offset canceling period. Further, an antenna switch is switched to a circuit system where DC offset canceling is not performed for preventing the input of the reception signal to a circuit system where DC offset canceling is performed.
Inventors:
Nakajima Tomoki
Makoto Nakamura
Kurimoto Hidehiko
Makoto Nakamura
Kurimoto Hidehiko
Application Number:
JP2004017173A
Publication Date:
March 04, 2009
Filing Date:
January 26, 2004
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H04B1/30; H04B1/00; H04B1/06; H04B1/16; H04B15/00; H04L27/14
Domestic Patent References:
| JP2002217769A | ||||
| JP2002217762A | ||||
| JP2001245006A | ||||
| JP2000092143A | ||||
| JP10135865A | ||||
| JP2004015409A |
Attorney, Agent or Firm:
Akio Miyai