Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4262433
Kind Code:
B2
Abstract:
Provided is a manufacturing method of a semiconductor device, which comprises exposing a surface of a semiconductor substrate on which a heterocrystalline layer is to be grown inside of a second emitter opening portion of a hetero-junction bipolar transistor, removing water by preheat treatment in a reducing gas atmosphere, subjecting the substrate to second heat treatment in a reducing gas atmosphere at a temperature which is higher than the preheating treatment but does not adversely affect the impurity concentration distribution of another element on the semiconductor substrate, thereby removing an oxide film formed on the surface on which the heterocrystalline layer is to be grown, and then selectively causing epitaxial growth of the heterocrystalline layer on the thus cleaned surface in the second emitter opening portion. According to the present invention, reliability of a semiconductor device having a hetero-junction bipolar transistor can be improved.
Inventors:
Tatsuya Tominari
Nao Hashimoto
Tomoko Jimbo
Working hard
Nao Hashimoto
Tomoko Jimbo
Working hard
Application Number:
JP2002043630A
Publication Date:
May 13, 2009
Filing Date:
February 20, 2002
Export Citation:
Assignee:
株式会社日立製作所
株式会社日立超エル・エス・アイ・システムズ
株式会社日立超エル・エス・アイ・システムズ
International Classes:
H01L21/331; H01L21/8222; H01L21/8248; H01L21/8249; H01L27/06; H01L29/732; H01L29/737
Domestic Patent References:
| JP10209172A | ||||
| JP11003894A | ||||
| JP11340245A | ||||
| JP2002289834A | ||||
| JP2000068285A | ||||
| JP2000243860A | ||||
| JP2002016160A | ||||
| JP11260828A |
Attorney, Agent or Firm:
Yamato Tsutsui