Title:
統合型の再プログラム可能な、不揮発性メモリ及び統合型プロセッサを有する回路のインサーキット・プログラミング中にエラー回復を行なう方法
Document Type and Number:
Japanese Patent JP4266839
Kind Code:
B2
More Like This:
Inventors:
Saint Albert Sea
Lee Chi H
Chen Chan El
Lee Chi H
Chen Chan El
Application Number:
JP2004012001A
Publication Date:
May 20, 2009
Filing Date:
January 20, 2004
Export Citation:
Assignee:
Macronics International Company Limited
International Classes:
G06F11/00; G06F11/30; G06F11/22; G06F11/28
Domestic Patent References:
| JP8255084A | ||||
| JP540619A | ||||
| JP619719A | ||||
| JP4319737A | ||||
| JP6110811A | ||||
| JP6252978A | ||||
| JP5265890A |
Foreign References:
| US5432927 |
Attorney, Agent or Firm:
Minoru Nakamura
Fumiaki Otsuka
Sadao Kumakura
Shishido Kaichi
Hideto Takeuchi
Nobuo Ogawa
Takaki Nishijima
Atsushi Hakoda
Fumiaki Otsuka
Sadao Kumakura
Shishido Kaichi
Hideto Takeuchi
Nobuo Ogawa
Takaki Nishijima
Atsushi Hakoda
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