Title:
集積圧電抵抗圧力センサ及びその製造方法
Document Type and Number:
Japanese Patent JP4298807
Kind Code:
B2
Abstract:
The pressure sensor is integrated in a SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements (10) and the electronic components (4, 6-8) integrated in the same chip, trenches (26) are formed in the upper wafer (23) of the substrate and extending from the surface to the layer of insulating material (22); the layer of insulating material (22) is chemically etched through the trenches (26) to form an opening (31) beneath the diaphragm (27); and a dielectric layer (25) is deposited to outwardly close the trenches (26) and the opening (31). Thus, the process is greatly simplified, and numerous packaging problems eliminated.
Inventors:
Benedetto Biguna
Paolo Ferrari
Flavio Villa
Paolo Ferrari
Flavio Villa
Application Number:
JP20633497A
Publication Date:
July 22, 2009
Filing Date:
July 31, 1997
Export Citation:
Assignee:
SGS-Thomson Microelectronics Sochieta Responsor Bill Limited
International Classes:
G01L9/06; H01L29/84; B81B3/00; B81C1/00; G01L9/00
Domestic Patent References:
| JP7007160A | ||||
| JP7504509A | ||||
| JP62076783A | ||||
| JP7038122A |
Attorney, Agent or Firm:
Takashi Ishida
Kenzo Hiraiwa
Toshio Toda
Masaya Nishiyama
Kenzo Hiraiwa
Toshio Toda
Masaya Nishiyama