Title:
半導体記憶装置及び電子機器
Document Type and Number:
Japanese Patent JP4317543
Kind Code:
B2
Abstract:
To provide a semiconductor memory device capable of highly discriminating information of memory cells.
Respective memory cells MC0, MC1, MC2, MC3 store information of one bit. Information stored in the respective memory cells MC0, MC1, MC2, MC3 is read out by comparing a first output corresponding to an output current from the memory cells MC0, MC1, MC2, MC3 when a current flows from a first input/output terminal to a second input/output terminal with a second output corresponding to an output current from the memory cells MC0, MC1, MC2, MC3 when a current flows from the second input/output terminal to the first input/output terminal.
COPYRIGHT: (C)2007,JPO&INPIT
Inventors:
Hiroshi Iwata
Yoshi Ota
Yoshi Ota
Application Number:
JP2005289948A
Publication Date:
August 19, 2009
Filing Date:
October 03, 2005
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G11C16/04; G11C16/06
Domestic Patent References:
JP2006294102A | ||||
JP2004348809A |
Foreign References:
US20050195650 |
Attorney, Agent or Firm:
Hiroshi Yamazaki
Atsushi Maeda
Atsushi Maeda