Title:
容量検出回路及び検出方法並びにそれを用いた指紋センサ
Document Type and Number:
Japanese Patent JP4387773
Kind Code:
B2
Abstract:
In a capacitance detecting circuit, changes in capacitances at intersections between a plurality of row lines and a column line are detected as voltages. The capacitance detecting circuit includes a column-line driver (5) for driving the column line. A code generator (1, 1B) generates code having orthogonality in chronological order. A selection synthesizer selects a certain number of row lines from the plurality of row lines by using the code and synthesizes measured voltages at the intersections between the selected row lines and the driven column line so as to output the synthesized measured voltage. A decoding computation unit (10) separates the measured voltages corresponding to the capacitances at the intersections by performing product sum computation between the synthesized measured voltage and the code.
Inventors:
Yuichi Umeda
Junichi Saito
Junichi Saito
Application Number:
JP2003394001A
Publication Date:
December 24, 2009
Filing Date:
November 25, 2003
Export Citation:
Assignee:
ALPS ELECTRIC CO.,LTD.
International Classes:
A61B5/117; G01B7/28; G06K9/00; G06T1/00
Domestic Patent References:
| JP2003028607A | ||||
| JP9097327A |
Attorney, Agent or Firm:
Sumio Tanai
Masatake Shiga
Tadashi Takahashi
Hideyuki Sugiura
Suzuki Mitsuyoshi
Yasuhiko Murayama
Tadao Takashiba
Masatake Shiga
Tadashi Takahashi
Hideyuki Sugiura
Suzuki Mitsuyoshi
Yasuhiko Murayama
Tadao Takashiba