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Title:
多層配線基板およびその製造方法
Document Type and Number:
Japanese Patent JP4394928
Kind Code:
B2
Abstract:

To provide a multilayer wiring board which can be reduced in size even when it is equipped with built-in electronic parts, improved in mounting density, and increased in reliability, and to provide a method of manufacturing the same easily.

Wiring layers and electric insulating layers are laminated on a core board for the formation of the multilayer wiring board. The wiring layers are desirably connected together through vertical conduction vias provided on the electric insulating layers, and the electronic parts are built in insulating resin layers. At least, an electronic part holding layer where the vertical conduction vias are provided on the insulating resin layer is provided between the wiring layer and the electric insulating layer and/or between the core board and the electric insulating layer. The electronic part holding layer is formed through a manner wherein the insulating resin layer equipped with a cutout for holding an electronic part inside and vertical conduction vias is formed direct on an underlying layer, and the electronic part is built in the cutout.

COPYRIGHT: (C)2005,JPO&NCIPI


Inventors:
Satoru Kuramochi
Fukuoka Yoshitaka
Application Number:
JP2003382111A
Publication Date:
January 06, 2010
Filing Date:
November 12, 2003
Export Citation:
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Assignee:
Dai Nippon Printing Co.,Ltd.
International Classes:
H05K3/46; H01L23/12; H01L25/16
Domestic Patent References:
JP1218042A
JP2002343934A
JP61064187A
JP2002246507A
JP8264953A
Attorney, Agent or Firm:
Junzo Yoneda
Hideo Sarada



 
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