半導体搭載用配線基板の製造方法、及び半導体装置の製造方法

Title:

半導体搭載用配線基板の製造方法、及び半導体装置の製造方法

Document Type and Number:

Japanese Patent JP4429280

Kind Code:

B2

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Inventors:

Hideya Murai
Naonori Shimodo
Takuo Funaya
Katsutoshi Kikuchi
Shintaro Yamado
Kazuhiro Baba
Koichi Honda
Keiichiro
Koji Matsui
Shinichi Miyazaki

Application Number:

JP2006068413A

Publication Date:

March 10, 2010

Filing Date:

March 13, 2006

Export Citation:

Assignee:

NEC
NEC Electronics Corporation

International Classes:

H01L23/12

Domestic Patent References:

Attorney, Agent or Firm:

Kimura Mitsuru

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