Title:
CDMA復調方法及び復調器
Document Type and Number:
Japanese Patent JP4480237
Kind Code:
B2
Abstract:
The invention provides a code division multiple access (CDMA) demodulating method and demodulator the method including the steps of: (a) sequentially-storing all input data, which are over-sampled by M-fold and go through a number (N) of paths, in a predetermined first memory, where M and N are predetermined positive integers; (b) generating PN codes for each of the N paths and storing the PN codes in a predetermined second memory; (c) generating and sequentially-storing traffic walsh codes of one period, which correspond to a processing gain L, in a predetermined third memory; (d) multiplying a complex-conjugated value with one of the values stored in the first memory and one of the values stored in the second memory; (e) performing a control operation for storing the PN codes in a predetermined address of the second memory and a control operation for outputting data for each of the N paths from the first, second, and third memories; (f) multiplying the resultant value of the step (d) with the traffic walsh codes of a corresponding path of data stored in the third memory; (g) cumulatively summing the resultant value of the step (f) L times for each of the N multi-paths to be processed, where L corresponds to the processing gain; (h) complex-conjugating the resultant value of the step (d) by cumulatively adding the resultant value of the step (d) X times for each of the N multi-path to be processed, where X corresponds to the data bit number of the walsh codes; (i) obtaining a number (N) of data by inputting the resultant value of the step (f) and the resultant value of the step (h) and multiplying the resultant value of the step (f) with the resultant value of the step (h); (j) sequentially-obtaining a number (N) of values by sequentially-inputting the number (N) of data obtained in the step (i) and taking only real values; (k) cumulatively summing the data obtained in the step (i) N times; and (i) deciding bit values based on logic values identified by identifying the logic values of the result of the step (k). The present invention reduces the number of necessary devices in a CDMA demodulator, thereby reducing the complexity and power consumption of the demodulator.
Inventors:
Money
All Satoshi Normal
All Satoshi Normal
Application Number:
JP2000210874A
Publication Date:
June 16, 2010
Filing Date:
July 12, 2000
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO.,LTD.
International Classes:
H04B1/707; H04J13/00
Domestic Patent References:
| JP11220454A |
Foreign References:
| EP1075090B1 | ||||
| WO1998002975A1 |
Attorney, Agent or Firm:
Kyosei International Patent Office