Title:
半導体デバイス試験方法・半導体デバイス試験装置
Document Type and Number:
Japanese Patent JP4495308
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a testing method testing a semiconductor device outputting reference clocks DQS utilized for exchanging data synchronously with the readout of data with high precision in a short time. SOLUTION: The leading or trailing timing of the data read from a semiconductor device under test and the leading or trailing timing of the reference clocks outputted synchronously with the data are sampled by strobe pulses constituted of multi-phase pulses having slight phase differences. The phase difference between the timing of the data and the timing of the reference clocks is measured, and the quality of the semiconductor device under test is judged based on whether the phase difference lies in the range of predetermined conditions or not by this semiconductor device testing method.
Inventors:
Takeo Miura
Application Number:
JP2000178917A
Publication Date:
July 07, 2010
Filing Date:
June 14, 2000
Export Citation:
Assignee:
Advantest Corporation
International Classes:
G01R31/319; G01R31/26; G01R31/28; G01R31/317; G11C29/00
Domestic Patent References:
| JP2000149593A | ||||
| JP7280884A | ||||
| JP7218299A | ||||
| JP2000105272A | ||||
| JP53108243A | ||||
| JP61022500A | ||||
| JP4236372A | ||||
| JP8075876A | ||||
| JP10260235A | ||||
| JP2001201532A |
Attorney, Agent or Firm:
Longhua International Patent Service Corporation
Naoki Nakao
Yukio Nakamura
Taku Kusano
Minoru Inagaki
Naoki Nakao
Yukio Nakamura
Taku Kusano
Minoru Inagaki