Title:
半導体装置およびその製造方法
Document Type and Number:
Japanese Patent JP4537702
Kind Code:
B2
Abstract:
Chipping of semiconductor chips is to be prevented. A semiconductor device comprises a semiconductor chip having a main surface, a plurality of pads formed over the main surface, a rearrangement wiring formed over the main surface to alter an arrangement of the plurality of pads, and a protective film and an insulating film formed over the main surface, and a plurality of solder bumps each connected to the rearrangement wiring and arranged differently from the plurality of pads. The presence of a bevel cut surface obliquely continuous to the main surface and formed on a periphery of the main surface of the semiconductor chip prevents chipping.
Inventors:
Noriyuki Takahashi
Application Number:
JP2003433603A
Publication Date:
September 08, 2010
Filing Date:
December 26, 2003
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
G01R31/26; G01R1/04; H01L23/12; G01R31/30; H01L21/02; H01L21/28; H01L21/301; H01L21/60; H01L21/66; H01L21/768; H01L21/78; H01L23/48; H01L23/50; H01L23/52; H01L23/58; H01L29/06; G01R31/28; H01L23/31
Domestic Patent References:
| JP9129772A | ||||
| JP11251493A | ||||
| JP2000243729A | ||||
| JP2002164136A | ||||
| JP10079362A |
Foreign References:
| WO2002050898A1 | ||||
| WO2003056613A1 |
Attorney, Agent or Firm:
Yamato Tsutsui