Title:
クロック信号出力装置及びその制御方法、電子機器及びその制御方法
Document Type and Number:
Japanese Patent JP4561829
Kind Code:
B2
Abstract:
Provided are a clock signal output unit that can increase the accuracy of a clock signal while avoiding the increase of the entire power consumption even with a high-accuracy oscillator having the relatively high power consumption, and a control method thereof, and an electronic device and a control method thereof. In a clock signal output unit being equipped with a quartz oscillator 41 generating a reference clock signal CL1, and generating, from the reference clock signal CL1, an output clock signal CL0 of a predetermined frequency for output, included are an atomic oscillator 42 that generates a clock signal CL2 whose accuracy is higher than that of the quartz oscillator 41, an intermittent time management section 47 that drives the atomic oscillator 42 in an intermittent manner, and a correction section 46 that acquires correction data for correcting an amount of displacement observed in the output clock signal CL0 with reference to the clock signal CL2 every time the atomic oscillator 42 is driven, and corrects the output clock signal CL0 based on this correction data.
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Inventors:
Seki Shigeaki
Katsutoyo Inoue
Katsutoyo Inoue
Application Number:
JP2007504807A
Publication Date:
October 13, 2010
Filing Date:
February 24, 2006
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
G04G3/00
Domestic Patent References:
| JP2000284077A | 2000-10-13 | |||
| JP2000315121A | 2000-11-14 | |||
| JPH07312549A | 1995-11-28 |
Attorney, Agent or Firm:
Patent Business Corporation Kushibuchi International Patent Office
Masayuki Kushibuchi
Kushibuchi Kazue
Masayuki Kushibuchi
Kushibuchi Kazue