Title:
半導体ダイのバンプ電力接続
Document Type and Number:
Japanese Patent JP4563400
Kind Code:
B2
Abstract:
An apparatus comprising: a die having a top metal layer, the top metal layer comprised of at least a first metal line and a second metal line; a passivation layer covering the top metal layer; a C4 bump on the passivation layer; and a first passivation opening and a second passivation opening in the passivation layer, the first passivation opening to connect the first metal line to the C4 bump, and the second passivation opening to connect the second metal line to the C4 bump.
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Inventors:
Bohr, Mark
Bob Martell
Bob Martell
Application Number:
JP2006543858A
Publication Date:
October 13, 2010
Filing Date:
November 24, 2004
Export Citation:
Assignee:
Intel Corporation
International Classes:
H01L23/12; H01L21/60; H01L23/485; H01L23/528; H01L23/522
Domestic Patent References:
| JP5094994A | ||||
| JP5109813A | ||||
| JP10270484A | ||||
| JP2001176966A | ||||
| JP2001035879A |
Attorney, Agent or Firm:
Tadahiko Ito
Shinsuke Onuki
Tadashige Ito
Koichi Sugiyama
Shinsuke Onuki
Tadashige Ito
Koichi Sugiyama