信号処理回路および方法 - ソニー株式会社

Title:

信号処理回路および方法

Document Type and Number:

Japanese Patent JP4565314

Kind Code:

B2

Abstract:

To prevent a difference in power consumption from occurring between when a logical level is 0 and when the logical level is 1.

A signal conversion circuit 21 converts an Lo or Hi signal bit corresponding to a logical bit 0 or 1 into an LoHi or HiLo two-bit signal bit, respectively and outputs the two-bit signal bit to an encryption processing circuit 22. Then, in the encryption processing circuit 22 of a stage following the signal conversion circuit 21, a one-bit logic is represented by a two-bit signal bit. The encryption processing circuit 22 performs DES (data encryption standard) encryption processing with the inputted LoHi or HiLo two-bit signal bit as one logical bit. This invention is applicable, for example, to an IC chip that performs encryption processing by a bit operation such as DES.

More Like This:

JP4570645	Devices, methods and systems for performing information access in a peer environment
JPH0934798	ELECTRONIC ASSEMBLY PROVIDED WITH INTEGRATED CIRCUIT DEVICE WITH LOCK CIRCUIT
JP6805662	Identification information generator, identification information generation program and identity verification support system

Inventors:

Shigeru Arisawa

Application Number:

JP2004070481A

Publication Date:

October 20, 2010

Filing Date:

March 12, 2004

Export Citation:

Click for automatic bibliography generation Help

Assignee:

ソニー株式会社

International Classes:

G09C1/00; H04L9/10

Domestic Patent References:

JP2000165375A
JP2004038318A
JP2003018143A
JP2002311826A
JP2001222571A

Attorney, Agent or Firm:

Yoshio Inamoto

Previous Patent: ポリエステル容器

Next Patent: 柱の配筋方法