Title:
アクティブマトリクス基板、表示装置、テレビジョン受像機
Document Type and Number:
Japanese Patent JP4584332
Kind Code:
B2
Abstract:
In an active matrix substrate of the present invention, a gate insulating film for covering a gate electrode of each transistor has a thin portion, having a reduced film thickness, which is provided on a part overlapped on the gate electrode, and the thin portion is formed by using the gate electrode, on which the thin portion is overlapped, as a mask, and each transistor has a first drain electrode section and a second drain electrode section which are respectively provided on both sides of a source electrode, and the thin portion has two edges opposite to each other, and the first drain electrode section is overlapped on the one edge, and the second drain electrode section is overlapped on the other edge. This makes it possible to provide an active matrix substrate which realizes high display quality while suppressing unevenness of parasitic capacitances (particularly, Cgd) of TFTs in the active matrix substrate whose each TFT has a thin portion in its gate insulating film.
Inventors:
Tsubata Toshihide
Masanori Takeuchi
Masanori Takeuchi
Application Number:
JP2008501612A
Publication Date:
November 17, 2010
Filing Date:
November 07, 2006
Export Citation:
Assignee:
Sharp Corporation
International Classes:
H01L21/336; G02F1/1368; H01L21/28; H01L29/417; H01L29/423; H01L29/49; H01L29/786
Domestic Patent References:
| JPH09179141A | 1997-07-11 | |||
| JPH01300567A | 1989-12-05 | |||
| JP2005223254A | 2005-08-18 | |||
| JPH10102003A | 1998-04-21 | |||
| JP2005159331A | 2005-06-16 |
Attorney, Agent or Firm:
Kenzo Hara International Patent Office