Title:
タイミング閉鎖方法
Document Type and Number:
Japanese Patent JP4594519
Kind Code:
B2
Abstract:
An automated method for designing an integrated circuit layout using a computer based upon an electronic circuit description and based upon cells which are selected from a cell library, each of the cells having an associated area, comprising the steps of: (a) placing each of the cells in the integrated circuit layout so that the cells can be coupled together by wires to form a circuit path having an associated predetermined delay constraint wherein the cells are coupled together based upon the electronic circuit description input to the computer; (b) connecting the cells together with the wires to form the circuit path; and (c) adjusting an area of at least one of the cells to satisfy the associated predetermined delay constraint of the circuit path.
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Inventors:
Van Jinneken, Lucas Pee Pee Pee
Kudva Prabhaker
Kudva Prabhaker
Application Number:
JP2000526885A
Publication Date:
December 08, 2010
Filing Date:
December 22, 1998
Export Citation:
Assignee:
SYN0PSYS, INC.
INTERNATIONAL BUSINESS MASCHINES CORPORATION
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
H01L21/82; G06F17/50
Domestic Patent References:
| JP7049903A |
Foreign References:
| US5459673 |
Attorney, Agent or Firm:
Sadao Kumakura
Fumiaki Otsuka
Takaki Nishijima
Hiroyuki Suda
Hiroshi Uesugi
Yoshinobu Iwasaki
Fumiaki Otsuka
Takaki Nishijima
Hiroyuki Suda
Hiroshi Uesugi
Yoshinobu Iwasaki