Title:
薄膜トランジスタ製造方法
Document Type and Number:
Japanese Patent JP4631116
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To evaluate the state of a polysilicon film which is formed by excimer laser annealing an amorphous silicon film. SOLUTION: Related to the manufacturing process for an bottom-gate TFT, a polysilicon film is formed, and then its quality is decided. At formation of the polysilicon film by annealing an amorphous silicon film, linearity and periodicity appear in the spatial structure in the film surface of formed polysilicon film, according to the energy giving to the amorphous silicon at annealing. After the linearity and periodicity are image-processed, the linearity and periodicity of the image are made into numerical values utilizing an auto-correlating function. Then, the auto-correlating value of the surface image of polysilicon film in an S/D region as well as that on a gate electrode are acquired, and both numerical results is utilized to decide the quality of the polysilicon film.
Inventors:
Hiroyuki Wada
Yoshimi Hirata
Ayumu Taguchi
Koichi Tatsuki
Umezu Nobuhiko
Shigeo Kubota
Tetsuo Abe
Akifumi Oshima
Tadashi Hattori
Masato Kotoku
Sugano Kobo
Yoshimi Hirata
Ayumu Taguchi
Koichi Tatsuki
Umezu Nobuhiko
Shigeo Kubota
Tetsuo Abe
Akifumi Oshima
Tadashi Hattori
Masato Kotoku
Sugano Kobo
Application Number:
JP2000005996A
Publication Date:
February 16, 2011
Filing Date:
January 07, 2000
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H01L21/20; H01L21/336; H01L21/268; H01L29/786
Domestic Patent References:
| JP10300662A | ||||
| JP10242052A |
Attorney, Agent or Firm:
Akira Koike
Eiichi Tamura
Seiji Iga
Eiichi Tamura
Seiji Iga