Title:
半導体装置
Document Type and Number:
Japanese Patent JP4658987
Kind Code:
B2
Abstract:
To simply and accurately execute change in the arrangement of bonding pads.
A semiconductor chip 40, having a plurality of bonding pads 41, is firmly fixed on a die pad 31. A relay chip 50 is firmly fixed on the semiconductor chip 40. The relay chip 50 has a plurality of bonding pads 51, and the bonding pads 51 are connected with one another via a wiring pattern 52 of a multilayer wiring structure, to change the arrangement of the bonding pads 41 on the semiconductor chip 40 side to a different direction. The bonding pads 41 are connected to the bonding pads 51 with wires 61, and the bonding pads 51 are connected to bonding pads 33 on a lead frame 30 side via wires 62.
COPYRIGHT: (C)2007,JPO&INPIT
Inventors:
Yoshihiro Saeki
Application Number:
JP2007093317A
Publication Date:
March 23, 2011
Filing Date:
March 30, 2007
Export Citation:
Assignee:
oki Semiconductor Co., Ltd.
International Classes:
H01L21/60; H01L23/50; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| JP11220091A | ||||
| JP2004056023A |
Attorney, Agent or Firm:
Kakimoto Yasunari