Title:
縦型GaN系電界効果トランジスタ、バイポーラトランジスタと縦型GaN系電界効果トランジスタの製造方法
Document Type and Number:
Japanese Patent JP4667556
Kind Code:
B2
Abstract:
There are provided a GaN field effect transistor (FET) exhibiting an excellent breakdown voltage owing to the high quality of GaN crystal in a region where the electric lines of force concentrate during operation of the same, and a method of manufacturing the same. The FET has a layer structure formed of a plurality of GaN epitaxial layers. A gate electrode and a source electrode are disposed on the surface of the layer structure, and a drain electrode is disposed on the reverse surface of the same. A region of the layer structure in which the electric lines of force concentrate during operation of the FET has a reduced dislocation density compared with the other regions in the layer structure. The GaN FET is manufactured by forming, on a crystal-growing substrate having a surface formed with a plane pattern of a material other than a GaN-based material in an identical design to a plane pattern of an electrode determining the region in which the electric lines of force concentrate, a plurality of GaN epitaxial layers, one upon another, by using the epitaxial lateral overgrowth technique, thereby forming a layer structure, and then forming operational electrodes on the surface of the layer structure.
Inventors:
Hiroi Ishii
Application Number:
JP2000041555A
Publication Date:
April 13, 2011
Filing Date:
February 18, 2000
Export Citation:
Assignee:
THE FURUKAW ELECTRIC CO.,LTD.
International Classes:
H01L29/78; C30B29/38; H01L21/20; H01L21/336; H01L29/12; H01L29/786; H01L29/20
Domestic Patent References:
| JP10223901A | ||||
| JP10312971A | ||||
| JP11501463A | ||||
| JP2000208760A | ||||
| JP10189944A |
Foreign References:
| WO1997011518A1 | ||||
| WO1999023693A1 |