Title:
半導体装置及びその製造方法
Document Type and Number:
Japanese Patent JP4685882
Kind Code:
B2
Abstract:
A method for forming a semiconductor device ( 100 ) includes a semiconductor substrate ( 102 ) having a first region ( 104 ), forming a gate dielectric ( 108 ) over the first region, forming a conductive metal oxide ( 110 ) over the gate dielectric, forming an oxidation resistant barrier layer ( 111 ) over the conductive metal oxide, and forming a capping layer over the oxidation resistant barrier layer. In one embodiment, the conductive metal oxide is IrO2, MoO2, and RuO2, and the oxidation resistant barrier layer includes TiN.
Inventors:
Scheffer The Third, James Kay.
Adetutu, Orbunmiou.
Adetutu, Orbunmiou.
Application Number:
JP2007552131A
Publication Date:
May 18, 2011
Filing Date:
December 16, 2005
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H01L21/8238; H01L27/092; H01L29/423; H01L29/49; H01L29/78
Domestic Patent References:
| JP2002289844A | ||||
| JP10173169A | ||||
| JP2002217409A | ||||
| JP2001127264A | ||||
| JP2001044428A | ||||
| JP2000208720A | ||||
| JP2002237469A | ||||
| JP9507342A | ||||
| JP2008511149A |
Foreign References:
| WO2004093182A1 |
Attorney, Agent or Firm:
Mamoru Kuwagaki