Title:
増幅回路
Document Type and Number:
Japanese Patent JP4704887
Kind Code:
B2
Abstract:
An amplifier circuit includes a first clock generator and a pulse width modulator. The first clock generator outputs a first clock of which frequency is dependent on the voltage level of a power supply voltage. The pulse width modulator generates a signal having a duration proportional to data based on the first clock.
Inventors:
Nobuyuki Shimizu
Application Number:
JP2005315016A
Publication Date:
June 22, 2011
Filing Date:
October 28, 2005
Export Citation:
Assignee:
oki Semiconductor Co., Ltd.
International Classes:
H03F3/217
Domestic Patent References:
| JP2004266398A | ||||
| JP2004312594A | ||||
| JP61039708A | ||||
| JP2004172715A |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Katsuichi Nishimoto
Hiroshi Fukuda
Kato Kazunori
Katsuichi Nishimoto
Hiroshi Fukuda