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Title:
離間して対向する基板を有するセル用スペーサ
Document Type and Number:
Japanese Patent JP4754072
Kind Code:
B2
Abstract:
In an active semiconductor backplane for a liquid crystal spatial light modulator, spacers ( 25 ) which are distributed over the backplane extend above an array of electrical and/or electronic elements and comprise at least two layers essentially of the same material and occuring in the same order as is found in at least one of the electrical or electronic elements, such as an NMOS transistor ( 52 ). The latter is formed from a stack of layers on a silicon substrate ( 51 ) comprising polysilicon ( 56 ), continuous silicon oxide ( 57 ) modified to include gate oxide GOX ( 55 ), metallic gate electrode ( 59 ), continuous silicon oxide ( 58 ) and a metallic drain electrode ( 60 ) which is coupled to a spaced mirror electrode over the layer ( 58 ). Likewise, spacer ( 25 ) comprises the layers ( 57 and 58 ) with metallic ( 67, 68 ) deposited simultaneously with electrodes ( 59, 60 ). The foot of layer ( 57 ) is differently modified to include field oxide layer ( 69 ) and polysilicon layers thin oxide ( 71 ). Spacers ( 25 ) are located regularly within the array of transistors ( 25 )/mirrors ( 65 ) and also about the array.

Inventors:
Crossland, William Alden
Wilkinson, Timothy David
Yu, Tat Chi Bee
Application Number:
JP2000589997A
Publication Date:
August 24, 2011
Filing Date:
December 16, 1999
Export Citation:
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Assignee:
Kinetic Limited
International Classes:
G02F1/141; G09F9/30; G02F1/1339; G02F1/1368; G09F9/35; G02F1/1335; G02F1/1362
Domestic Patent References:
JPH07506909A1995-07-27
JPH04226424A1992-08-17
JPH0682811A1994-03-25
JPS64924A1989-01-05
JPH01271725A1989-10-30
Attorney, Agent or Firm:
Yoshio Kawaguchi
Mitsuru Inoue
Akio Ichiiri
Katsuma Osaki
Takamasa Soma