Title:
不揮発性強誘電体メモリ装置及びそれを用いたマルチビットデータの書込み方法
Document Type and Number:
Japanese Patent JP4801125
Kind Code:
B2
Abstract:
A nonvolatile ferroelectric memory device and a method for writing and reading multiple-bit data using the same, in which multiple bit data is stored in one cell to reduce a cell layout area, thereby obtaining price competitiveness of a chip. The nonvolatile ferroelectric memory device includes a sensing amplifier block having multiple sensing amplifiers comparing multiple-level signals from main bitlines and sensing them in a multiple-bit, the sensing amplifiers being commonly used in a multiple cell array blocks to feed the sensed multiple-bit levels back and restore them in a cell, and switching transistors arranged one by one per sub bitline to sense data values of the unit cell.
Inventors:
Khan, Hee Bok
Application Number:
JP2008209678A
Publication Date:
October 26, 2011
Filing Date:
August 18, 2008
Export Citation:
Assignee:
HYNIX SEMICONDUCTOR INC.
International Classes:
G11C11/22; G11C11/56
Domestic Patent References:
| JP4195897A | ||||
| JP6119773A | ||||
| JP2000022010A | ||||
| JP2000149584A | ||||
| JP2000040378A |
Attorney, Agent or Firm:
Masaki Yamakawa
Shigeki Yamakawa
Shigeki Yamakawa