Title:
画像処理回路
Document Type and Number:
Japanese Patent JP4806653
Kind Code:
B2
Abstract:
an image processing circuit includes a memory storing an image data, which includes a plurality of line data disposed regularly a first module performing a plurality of thinning processes, at each of which a plurality of line data are readout from the memory, and at each of which one line data is processed by using the readout line data, wherein the processed line data is restored in the memory, and wherein the first image processing module outputs a first signal after the thinning processes for a certain times are completed, and a second module, which start its operation in response to the first completion signal, performing a similar image-process performed by the first module, wherein the second image processing module outputs a second completion signal after the thinning processes for the entire image data stored in the memory are completed.
Inventors:
Atsushi Yabushita
Application Number:
JP2007132596A
Publication Date:
November 02, 2011
Filing Date:
May 18, 2007
Export Citation:
Assignee:
oki Semiconductor Co., Ltd.
International Classes:
G06T5/30; G06T1/20; G06T1/60; G06V10/34
Domestic Patent References:
| JP2003241983A | ||||
| JP3224071A |
Attorney, Agent or Firm:
Kakimoto Yasunari