Title:
外部記憶装置およびそのメモリアクセス制御方法
Document Type and Number:
Japanese Patent JP4813454
Kind Code:
B2
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| JPH0638219 | [Title of the Invention] A processing device to be supplied with a memory backup. |
| WO/1997/049031 | ERROR DETECTION DEVICE AND METHOD |
Inventors:
Takayuki Tamura
Shigemasa Shioda
Kunihiro Katayama
Naito
Shigemasa Shioda
Kunihiro Katayama
Naito
Application Number:
JP2007329911A
Publication Date:
November 09, 2011
Filing Date:
December 21, 2007
Export Citation:
Assignee:
Solid State Storage Solutions LLC
International Classes:
G06F12/16; G06F12/00
Domestic Patent References:
| JP62133547A | ||||
| JP63285778A | ||||
| JP5290524A | ||||
| JP2123442A | ||||
| JP6119128A | ||||
| JP7044669A |
Attorney, Agent or Firm:
Satoshi Furuya
Takahiko Mizobe
Kiyoharu Nishiyama
Takahiko Mizobe
Kiyoharu Nishiyama