To provide a read-out circuit of a magnetic memory which can accurately read out information.
When first data "0" is written by a write control circuit 1, output waveforms from a magneto-resistance effect element MR are different in accordance with a direction of magnetization of a magnet-sensitive layer. When the output waveform of the magneto-resistance effect element MR in writing is such waveform that the first data "0" is already written, the first waveform is output, when the second data "1" is already written in the magneto-resistance effect element MR, the second waveform is output. A deciding circuit 5 decides whether the input waveform is the first waveform (=0) or the second waveform (=1). When magnetization reversal is caused in writing, since the second waveform (=1) having large voltage variation is output, the deciding circuit 5 decides that the output waveform is the second waveform using threshold decision or the like.
COPYRIGHT: (C)2007,JPO&INPIT
| JP4138254 | Storage cell structure and how to manufacture it |
| JP5308972 | Semiconductor device |
| WO/2003/098636 | STACKED 1T-nMEMORY CELL STRUCTURE |
| JP2003257173A | ||||
| JP2004288844A | ||||
| JP2005251336A | ||||
| JP2002100181A | ||||
| JP2003151262A | ||||
| JP2003510752A | ||||
| JP2004515030A | ||||
| JP2003506812A |
大石基之,NECがMRAMで巻き返し 外部記憶向けの開発で先行 クロスポイント型チップを初めて発表,日経エレクトロニクス,日本,日経BP社,2003年 2月17日,no.841,p.28-29
Shiro Terasaki
Hiroaki Aoki