Title:
直交変換回路
Document Type and Number:
Japanese Patent JP4854277
Kind Code:
B2
Abstract:
To efficiently transfer data even when a bit width of effective data on a transfer bus varies, and to perform an orthogonal transform, in a circuit performing the orthogonal transform of a data array.
A path setting circuit (122) changing over a data transfer path according to the effective transfer data bit width is provided between a data bus (96) and an orthogonal memory cell array (110), and a writing area is set by read/write circuits (113a-113d) according to the bit width of the data transferred through the bus. Thereby, in the orthogonal memory cell array (110), the effective data can be stored in different entries according to the bit width of the effective data.
COPYRIGHT: (C)2007,JPO&INPIT
Inventors:
Katsuya Mizumoto
Masami Nakajima
Masami Nakajima
Application Number:
JP2005331517A
Publication Date:
January 18, 2012
Filing Date:
November 16, 2005
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
G06F13/36; G06F5/00; G06F12/04
Domestic Patent References:
| JP10207868A | ||||
| JP5022629A | ||||
| JP6161954A | ||||
| JP2005044386A | ||||
| JP2001067306A |
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Masayuki Sakai
Nobuo Arakawa
Masato Sasaki
Hisato Noda
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Masayuki Sakai
Nobuo Arakawa
Masato Sasaki
Hisato Noda