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Title:
プリント基板におけるパターンのループ形状の計算方法、その装置、コンピューター読み取り可能な記録媒体およびプログラム
Document Type and Number:
Japanese Patent JP4890950
Kind Code:
B2
Abstract:

To suppress various expenses such as development cost and manufacturing cost associated with production of a printed board while suppressing occurrence of a problem of EMC (electromagnetic compatibility).

The pattern loop shape calculation method for printed board, for evaluating a loop shape of a pattern formed by a power supply network or GND (ground) network in a printed board, comprises first processing for selecting an object network for loop detection among the power supply network or GND network; second processing for extracting a loop point for each object network selected by the first processing; third processing for selecting a loop to be detected from the loop points extracted by the second processing; and fourth processing for calculating an adaptation ratio of the loop selected by the third processing with a predetermined condition.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
Nomura Masashi
Kazuyuki Hagiwara
Application Number:
JP2006157841A
Publication Date:
March 07, 2012
Filing Date:
June 06, 2006
Export Citation:
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Assignee:
Zuken Co., Ltd.
International Classes:
G06F17/50
Domestic Patent References:
JP2001155048A
JP2003196340A
JP2006080311A
JP11316774A
Attorney, Agent or Firm:
Junichi Ueshima



 
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