Title:
半導体記憶装置
Document Type and Number:
Japanese Patent JP4891704
Kind Code:
B2
Abstract:
A semiconductor memory device including an error detecting and correcting system, wherein the error detecting and correcting system includes a 3EC system configured to be able to detect and correct 3-bit errors, and wherein the 3EC system is configured to search errors in such a manner that 3-degree error searching equation is divided into a first part containing only unknown numbers and a second part calculative with syndromes via variable transformation by use of two or more parameters, and previously nominated solution indexes collected in a table and syndrome indexes are compared to each other.
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Inventors:
Haruki Toda
Application Number:
JP2006230375A
Publication Date:
March 07, 2012
Filing Date:
August 28, 2006
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G11C29/42; G06F12/16; G11C16/04; G11C16/06; H03M13/15
Domestic Patent References:
| JP4621715B2 | ||||
| JP200943385A | ||||
| JP2007220260A | ||||
| JP2007234086A |
Attorney, Agent or Firm:
Masaru Itami
Kazuhiko Tamura
Kazuhiko Tamura