Title:
半導体装置
Document Type and Number:
Japanese Patent JP4927340
Kind Code:
B2
Abstract:
In a semiconductor device of the present invention, an N-type buried diffusion layer is formed across a substrate and an epitaxial layer. A P-type buried diffusion layer is formed across an upper surface of the N-type buried diffusion layer over a wide range to form a PN junction region for an overvoltage protection. A P-type diffusion region is formed so as to be connected to the P-type buried diffusion layer. A breakdown voltage of the PN junction region is lower than a breakdown voltage between a source and a drain. This structure makes it possible to prevent a concentration of a breakdown current and protect the semiconductor device from an overvoltage.
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Inventors:
Ryo Kanda
Shuichi Kikuchi
Seiji Otake
Shuichi Kikuchi
Seiji Otake
Application Number:
JP2005049006A
Publication Date:
May 09, 2012
Filing Date:
February 24, 2005
Export Citation:
Assignee:
ON Semiconductor Trading Limited
International Classes:
H01L29/78; H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/088
Domestic Patent References:
| JP2006505136A | ||||
| JP2002158348A | ||||
| JP2002026314A |
Foreign References:
| WO2004042826A1 |
Attorney, Agent or Firm:
Takashi Okada
Yoshitaka Okada
Naoko Shiraishi
Yoshitaka Okada
Naoko Shiraishi